It has been recognized by workers in the art of metal oxide semiconductor field effect transistor (MOSFET) structures that a shallow source or drain diffusion (small junction depth) can yield desirable device characteristics. For example, in an article by R. Hori et al. entitled "Short Channel MOS-IC Based on Accurate Two-Dimensional Device Design", published in Supplement to Japanese Journal of Applied Physics, Vol. 15, pp. 193-199 (1976), it was recognized that relatively shallow source and drain junction depths could help yield a relatively low threshold voltage shift in a short-channel MOSFET structure as well as a relatively high punch-through breakdown voltage. By "short-channel" is meant a source to drain separation of less than about 2 microns. Short-channel MOSFET structures are desirable from the standpoint of high frequency operation (of the order of 1 GHz) and miniaturization of size, particularly in very large scale integration of various semiconductor circuits, such as in a memory array in which each memory cell contains such a short-channel MOSFET.
A short-channel MOSFET made by conventional techniques suffers from undesirable device properties stemming from a relatively high parasitic capacitance between the polycrystalline silicon ("polysilicon") gate electrode and the source or drain (or both). Similarly, a conventionally fabricated short-channel metal gate (Schottky barrier) field effect transistor (MESFET) device structure suffers from the problem of undesirably high ohmic resistance along a path from source or drain electrode (or both) to the conducting portion of the channel during operation in the ON state of the device. It would, therefore, be desirable to have a method for making short-channel transistors alleviating these problems.